1. Field of the Invention
The present invention relates to a lithography apparatus for performing pattern formation on a substrate, a lithography method, and a method of manufacturing an article.
2. Description of the Related Art
Candidates for a future lithography method (e.g., a lithography method for manufacturing a semiconductor device having a half pitch of 16 nm or less) include multiple electron beam lithography. In the multiple electron beam lithography, there is a concern that a large amount of power (energy) is incident on a substrate (e.g., a wafer). More specifically, it may be difficult to achieve required overlay accuracy due to thermal deformation of the wafer caused by the large amount of power. This concern may also exist in other lithography methods such as an argon fluoride (ArF) (immersion) lithography method and an extreme ultraviolet (EUV) lithography method.
A measure against such thermal deformation includes a technique discussed in Japanese Patent Application Laid-Open No. 2004-128196. Japanese Patent Application Laid-Open No. 2004-128196 discusses a technique for calculating and storing, from a calculation result of thermal deformation that will appear in a sample by irradiation with an electron beam, data required to correct an amount of deviation that will appear in an irradiation position of the electron beam, and correcting at least one of an irradiation amount and an irradiation position of the electron beam according to the data.
A substrate processing apparatus discussed in U.S. Pat. No. 7,897,942 measures positions of a plurality of targets (marks) formed on a substrate while it is being moved and processed (drawn). Deformation of the substrate being processed is compensated for through a process of curve fitting the shape of the substrate among the plurality of targets.
In an electron beam exposure method discussed in Japanese Patent Publication No. 05-044172, part of a mark for detecting an exposure deviation of a pattern due to electric charging of a resist has been previously formed by exposure at a plurality of positions within an exposure surface of a base material (substrate). Then, while the substrate pattern is exposed, the other part of the mark is sequentially formed by exposure to overlay the previously formed part at each of the corresponding positions. According to this method, the exposure deviation due to electric charging can be detected by detecting the mark for detecting an exposure deviation.
In the method discussed in Japanese Patent Application Laid-Open No. 2004-128196, the thermal deformation that will appear in a sample by irradiation with an electron beam is obtained through simulation. Accordingly, considering that a lithography apparatus forms various patterns for various samples, construction of a model suitable for the simulation and preparation of data therefor are significantly difficult or complicated. There may also be a change in condition, which affects overlay errors that will occur in the process of forming a pattern (a change in condition which reproducibly occurs), other than thermal deformation of a substrate (a change in shape or size by heat). However, the method discussed in Japanese Patent Application Laid-Open No. 2004-128196 cannot cope with such a change.
In the method discussed in U.S. Pat. No. 7,897,942, the positions of the targets on the substrate being processed are measured to compensate for the deformation of the substrate in real time. Therefore, when the deformation is large, it is difficult to measure and compensate for the deformation. Accordingly, only using this method may be disadvantageous in terms of overlay accuracy of a lithography apparatus.
The method discussed in Japanese Patent Publication No. 05-044172 is not sufficient to exhibit the overlay performance of a lithography apparatus because mark exposure positions are limited to specific one spot around a field (a shot) and there is no degree of freedom in the arrangement or the number of the mark exposure positions.